In the automobile engine, it is generally customary to lower the idling speed thereof for attaining an improved fuel economy as well as reducing the amount of exhaust gas. However, considering the variation in engine capabilities and the subsequent secular change induced therein, a certain limit is existent in lowering the idling speed. Under such circumstances, it is the latest trend to employ an electronic control apparatus which is capable of achieving accurate and stable control of the idling speed continuously for a long time.
FIG. 1 is a block diagram of an exemplary conventional apparatus used for control of an idling speed by changing the stopper position of a throttle valve with employment of a DC motor. The apparatus shown comprises an ignition coil 1, an ignition coil controller 2, a period measuring circuit 3, an actual speed computing circuit 4 (second unit), a desired speed computing circuit 5 (first unit), a load switch 51 for an air conditioner or the like, a cooling water temperature sensor 52, a difference detecting circuit 6 (third unit), a control pulse width computing circuit 7 (fourth unit), a pulse width counter 8, a control period counter 9, a control signal generating circuit 10 (fifth, unit), a driving circuit 11 (sixth unit), a throttle valve actuator 12, a throttle valve 13, and an accelerator pedal 14. The throttle valve actuator 12 comprises a DC motor 121, a reduction mechanism 122 for converting the rotary motion of the DC motor 121 into a linear motion, an idle switch 123 for detecting the fully closed position of the accelerator pedal 14, a throttle stopper 124 moved linearly by the reduction mechanism 122, and a cam mechanism 125 interlocked with the throttle valve 13.
In the conventional apparatus mentioned above, the following operation is performed. Period measuring circuit 3 is connected to ignition coil 1 so as to measure the time interval between ignition signals. Actual speed computing circuit 4 converts the output of period measuring circuit 3, which represents the time interval between ignition signals, into a speed signal of a weight corresponding to the actual rotational speed. Desired speed computing circuit 5 computes a desired idling speed and feeds the result to difference detecting circuit 6. Then the circuit 6 compares the output of actual speed computing circuit 4 with the output of desired speed computing circuit 5 and feeds the difference therebetween as a rotational speed difference signal to control pulse width computing circuit 7 while outputting a signal, which represents the numerical relationship between the output values of computing circuits 4 and 5, to both control pulse width computing circuit 7 and control signal generating circuit 10. Control pulse width computing circuit 7 computes an optimal time for driving DC motor 121 in accordance with the aforesaid two signals and feeds the result to pulse width counter 8. FIG. 2 graphically shows the relationship between the rotational speed difference signal and the DC motor driving time, wherein the speed difference is plotted along the abscissa while the driving time is plotted along the ordinate. Since the driving time is zero within a range where the speed difference is less than a dead zone speed Nd, DC motor 121 is not driven so that the position of throttle stopper 124 remains unchanged. The right side from the zero point of the speed difference corresponds to a range where the actual engine speed is lower than the desired idling speed, representing the relationship between the speed difference and the driving time in the case of opening throttle valve 13 by rotating DC motor 121 in its forward direction and shifting cam mechanism 125 via throttle stopper 124. To the contrary, the left side from the zero point of the speed difference corresponds to a range where the actual engine speed is higher than the desired idling speed, representing the relationship between the speed difference and the driving time in the case of closing throttle valve 13 by rotating DC motor 121 in its reverse direction.
In the meanwhile, control period counter 9 serves to count the period for intermittently driving DC motor 121 and feeds an output signal to pulse width counter 8 per predetermined period (T) shown in FIG. 3. Pulse width counter 8 is of a preset type which functions to preset the output value of control pulse width computing circuit 7 in response to the output signal of control period counter 9 and simultaneously starts subtractive count per fixed time. Pulse width counter 8 continues such subtractive count until reduction of its content to zero and then feeds an output signal to control signal generating circuit 10. This circuit 10 judges from the output signal of difference detecting circuit 6 the numerical relationship between the desired idling speed and the actual engine speed and, when the latter speed is lower than the former speed, introduces the output signal of pulse width counter 8 as a forward rotation signal to the output terminal 101. To the contrary, when the actual engine speed is higher than the desired idling speed, the circuit 10 introduces the output signal of pulse width counter 8 as a reverse rotation signal to the output terminal 102. However, merely in the on-state of idle switch 123 where the accelerator pedal 14 is placed at the fully closed position thereof, control signal generating circuit 10 feeds its signal to the output terminal 101 or 102 to execute the idling speed control. Driving circuit 11 rotates DC motor 121 in the forward direction during the presence of the output signal at terminal 101, whereby throttle stopper 124 is pushed out to open throttle valve 13, hence raising the engine speed. To the contrary, DC motor 121 is rotated in the reverse direction during the presence of the output signal at terminal 102, so that throttle stopper 124 is withdrawn to close throttle valve 13 and thereby lowers the engine speed.
An exemplary operation performed until stabilization of the engine speed will now be described with reference to FIG. 3, which shows the state where accelerator pedal 14 is placed at its fully closed position and the engine load has been increased prior to time t1 to render the engine speed N lower than the desired idling speed N.sub.0. The engine speed is N.sub.1 at time t1, and the output value of control pulse width computing circuit 7 is TP1 in FIG. 2. Accordingly, pulse width counter 8 produces an output signal during time length TPl posterior to time t1. Since the current engine speed N is lower than the desired idling speed N.sub.0, the output of pulse width counter 8 is introduced to the output terminal 101 of control signal generating circuit 10 as shown in FIG. 3 (a), so that driving circuit 11 rotates DC motor 121 in its forward direction during time length TP1, thereby pushing out throttle stopper 124. As a result, throttle valve 13 is opened to raise the engine speed. In the next stage where the engine speed reaches N2 at time t2 after the lapse of a predetermined period T from time t1, the engine speed N2 is still lower than the desired idling speed N.sub.0, so that DC motor 121 is further rotated in its forward direction during time length TP2 as in the preceding stage. Consequently, the engine speed N is so raised that the difference between N and N.sub.0 becomes smaller than the dead zone speed Nd prior to arrival at time t3, and therefore the signal for driving DC motor 121 is no longer outputted at time t3. Thereafter, DC motor 121 is not driven until the speed difference exceeds the dead zone speed Nd due to some external disturbance. Thus, it becomes possible to maintain the engine speed N at the desired idling speed N.sub.0 by intermittently driving DC motor 121 under control in the manner described.
For attaining enhanced response characteristic in the conventional apparatus mentioned above, it is necessary to shorten the period of intermittent control. However, shortening the period brings about a problem which will be explained below with reference to FIG. 4. When the engine speed is N3 at time t3 with accelerator pedal 14 placed at its fully closed position, DC motor 121 is rotated in the forward direction during time length TP3 to increase the engine speed. Meanwhile, since period T1 is set to be shorter than period T shown in FIG. 3, the engine speed is not rendered stable even at time t4 after the lapse of period T1 and is thereby kept varying continuously. Supposing that the control is interrupted posterior to time t4, the engine speed is successively increased for a while even after time t4 and then is stabilized as shown by a dotted line A in FIG. 4. However, since time length TP4 for driving the DC motor 121 is determined on the basis of the difference between the engine speed N4 and the desired idling speed N.sub.0 at time t4, it follows that throttle valve 18 is opened excessively by a value corresponding to the increase shown by the dotted line A in FIG. 4, thereby causing overshoot of the engine speed N as shown in FIG. 4 (c) to consequently induce an unsatisfactory result with respect to the control. In order to prevent occurrence of such a phenomenon, it is necessary to select a proper intermittent control period which causes no overshoot of the engine speed N even with the maximal driving time length TP.sub.MAX allowable for the control. But the period selected in this manner becomes unduly long to deteriorate the response characteristic eventually. Thus, a problem has been existent heretofore with regard to extreme difficulties in achieving satisfactory compatibility of the control and response characteristics.